1. Field of the Invention
The invention relates generally to LOCOS type field isolating films, and to semiconductor memory devices employing such films, and more particularly, to an improved LOCOS film structure wherein, when incorporated in a semiconductor memory device, the surface area of the film is minimized while sufficient electrical insulation between adjacent memory cells of the memory device is maintained. The invention is also related to manufacturing methods therefor.
2. Description of the Background Art
In general, a semiconductor device comprises a lot of semiconductor elements disposed on the surface of a silicon substrate, to constitute a large-scale integrated circuit. The semiconductor elements are electrically insulated and isolated by field isolation oxide films formed in a predetermined position on the surface of a semiconductor substrate.
FIG. 6 is a cross-sectional view showing a conventional field isolation oxide film formed by a LOCOS (Local Oxidation of Silicon) process. FIGS. 7A to 7D are cross-sectional views showing manufacturing processes of the field isolation oxide film shown in FIG. 6. Referring now to FIGS. 6, 7A to 7D, description is now made of a structure of the conventional field isolation oxide film.
First, as shown in FIG. 7A, an underlying oxide film 2 such as a silicon oxide film is formed on the surface of a semiconductor substrate 1. In addition, a silicon nitride film (Si.sub.3 N.sub.4) 3 having resistance to oxidation is formed thereon.
Then, as shown in FIG. 7B, a resist 4 is applied on the surface of the silicon nitride film 3, to be patterned in a predetermined shape. The silicon nitride film 3 is selectively etched away utilizing this resist 4 as a mask.
Additionally, as shown in FIG. 7C, when oxidation is carried out utilizing as masks the silicon nitride films 3 patterned by etching, the underlying oxide film 2 masked is almost unchanged in thickness. However, field isolation oxide films 5 grown thick are formed in the exposed underlying oxide film 2 and on the surface of the semiconductor substrate 1 in the lower part thereof.
Thereafter, as shown in FIG. 7D, the silicon nitride films 3 are removed, so that field isolation oxide films 5 are formed on the surface of the semiconductor substrate 1.
Referring to FIG. 6, surface regions of the semiconductor substrate 1 located between the field isolation oxide films 5 respectively constitute element forming regions 6. In addition, oxide film regions 7 like a beak referred to as bird's beak extending to the element forming regions 6 are formed in both ends of each of the field isolation oxide films 5. The bird's beak 7 reduces the effective area of the element forming regions 6. Furthermore, the thicker the field isolation oxide film 5 is formed so as to improve isolation characteristics, the larger the bird's beak 7 becomes. Occurrence of the bird's beaks 7 is a large factor which prevents high integration density of the semiconductor device.
As an example of a semiconductor device having such a conventional field isolation oxide film 5, a DRAM (Dynamic Random Access Memory) will be described with reference to FIGS. 8 and 9. FIG. 8 is a partial plan view showing a memory cell array of the DRAM. FIG. 9 is a cross-sectional view taken along a line A--A in FIG. 8. Referring to FIGS. 8 and 9, a memory cell array 8 of the DRAM stores storage information corresponding to one bit. The memory cell array 8 comprises a plurality of memory cells 9 arranged in a matrix of rows and columns. A plurality of word lines 10 extending in parallel and a plurality of bit lines 11 extending in parallel in the direction perpendicularly intersecting with the word lines 10 are formed on the surface of a semiconductor substrate 1. In addition, a plurality of auxiliary word lines 12 are formed in upper layer portions of the word lines 10 in the direction which coincides with the plurality of word lines 10. The auxiliary word lines 12 are electrically connected to the word lines 10 in several portions in a longitudinal direction thereof (not shown). Such structure improves responsiveness of the word line 10, since the voltage is applied from a plurality of portions through the auxiliary word line 12. Memory cells 9 are formed in the vicinity of intersections of the word lines 10 and the bit lines 11. Each of the memory cells 9 comprises a single MOS (Metal Oxide Semiconductor) transistor 13 and a single capacitor 14. A gate electrode 10a of the MOS transistor 13 is constituted by a part of the word line 10. A gate oxide film 15 is formed on a lower layer of the gate electrode 10a. In addition, source/drain regions 16 are formed on the surface of the semiconductor substrate 1 located on both sides of the gate electrode 10. The bit line 11 is electrically connected to one of the source/drain regions 16 of the MOS transistor 13 through a contact hole 17. The capacitor 14 comprises an insulating film 18 formed on the surface of the semiconductor substrate 1 and an electrode layer 19 of a polysilicon (polycrystalline silicon) layer formed on the surface thereof. Referring to FIG. 9, the capacitor 14 is formed on the surface of the semiconductor substrate 1 between field isolation oxide films 5 formed on the surface of the semiconductor substrate 1 located on both sides thereof. Charge storage capacity is determined by the opposing area of the insulating film 18, the electrode layer 19 and the surface of the semiconductor substrate 1.
As described in the foregoing, the conventional field isolation oxide film 5 has the disadvantage that the element forming regions become narrower due to occurrence of the bird's beaks 7. This disadvantage becomes a serious problem particularly in a memory cell structure of the DRAM having the above described planer type capacitor 14. More specifically, the capacitor 14 of the DRAM is generally required to maintain predetermined capacity for storing charges of storage information. However, as the semiconductor device is highly integrated in recent years, the plane area occupied by the capacitor 14 formed on the surface of the semiconductor substrate 1 is reduced. Consequently, the capacity of the planer type capacitor 14 tends to be lowered. In addition, the bird's beaks 7 of the field isolation oxide film 5 cause capacitor 14 forming regions to become narrower, which prompts the decrease in the capacity of the capacitor 14.